The IP is aimed at enabling the design of CryoCMOS control chips for quantum computing
Siemens Digital Industries Software announced collaboration with sureCore and Semiwise to develop cryogenic CMOS circuits that can operate at temperatures near absolute zero, essential for quantum computing systems. It is poised to bring about substantial improvements in performance and power efficiency for integrated circuits (ICs) designed for high-performance computing (HPC) and other advanced applications.
The core challenge in quantum computing is the development of control electronics capable of operating at cryogenic temperatures. Leveraging Siemens’ analog/mixed-signal IC design technology, Semiwise has created cryogenic CMOS circuit designs. These designs incorporate cryogenic SPICE models and SPICE simulator technology capable of conducting accurate analyses at cryogenic temperatures.
This intellectual property (IP), crucial for sureCore’s development of its CryoIP product line, is developed using Siemens’ Analog FastSPICE (AFS). It is aimed at enabling the design of CryoCMOS control chips for quantum computing. The use of the AFS platform and Solido Design Environment software proved reliable and accurate at cryogenic temperatures. It enabled design of analog circuits, standard cell libraries, and memory designs, including SRAM, register files, and ROM.
AFS platform offers advanced circuit verification for various types of circuits, including nanometer analog, RF, mixed-signal, memory, and custom digital circuits. The platform provides a comprehensive use model with capabilities ranging from small signal and transient analysis to RF, noise, aging, and multi-sim verification.
The Solido Design Environment, powered by AI technology, provides a platform for nominal and variation-aware analysis. It helps users in optimising circuits for power, performance, and area, and facilitates statistical yield analysis, reducing runtime compared to traditional methods.
sureCore is making significant progress towards its first CryoIP tapeout, using GlobalFoundries’ 22FDX process design kit.