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Mobiveil and Avery Design Collab for NVMe 2.0 SSD Development

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Avery Design Systems and Mobiveil recently announced that they will extend their ongoing partnership to boost the development of NVMe-based SSD design and verification. The complementary intellectual property/verification (IP/VIP) solution works in conjunction with Mobiveil’s design IP for NVM Express, DDR4 and LDPC IP with Avery’s verification IP for NVMe, DDR4 and ONFI and NVMe virtual platform technologies. Both the companies are also working in tandem on SSD emulation platforms.

“As the NVMe standard continues to evolve to meet new and changing requirements, it is important that product developers have access to design and verification solutions that allow them to take full advantage of the latest features and are compliant with the standard. Our NVMe VIP and virtual platform solutions provide pre-silicon SSD SoC hardware and system-level verification solutions for the latest NVMe 2.0 designs. Our partnership with Mobiveil means that together we can deliver best-in-class IP design and verification solutions to our customers including simulation, FPGA emulation, and virtual system platforms,” explained Chris Browy, vice president of sales and marketing at Avery.

“By providing pre-verified and interoperated SSD Design IP and Verification IP, both companies allow SoC design and verification teams to focus on their primary goal of full chip design and verification, thus significantly reducing their time to market,” said Ravi Thummarukudy, Mobiveil’s CEO. “By leveraging the intellectual property provided by these companies with specification-compliant solutions, designers can be assured of first-time success for their SoC designs”.

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Mobiveil’s UNEX NVM Express Controller IP and Avery NVMe-Xactor have support for the latest NVMe 2.0 configurations and, additionally, Mobiveil’s ONFI/Toggle IP (EFC) offers support for the latest ONFI 5.0 configurations. The two IPs are fully ascertained using Avery Design’s NVMe/PCIe and ONFI VIP technologies. The virtual platform co-simulation technology helps enable a whole system-level verification which includes running the UNH-IOL INTERACT and other Linux-based implementation analysis applications on pre-silicon NVMe SoC configurations.


 

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Nishchay Pandey
Nishchay Pandey
Bioengineer with a knack for writing, I love IoT, Open-source and creativity.

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