How Can India Build Competence In Chip Design And Be Self Reliant

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The article portrays briefly the present status of chip design activities in India, significance of competence building and highlights why India could not build competence in chip design. The author suggests what can be done now to cultivate the same and has outlined a two point action plan in this regard. 

Scenario of chip design in India

During the SemiconIndia-22 conference held at Bangalore in April this year, our worthy minister of electronics and information technology stated that the world’s leading chip manufacturers and fabless companies are having their chip design centres in Bangalore, Hyderabad, Chennai and Pune designing chips for their worldwide customers. It was also shared that about 20% of the world’s chip designers working in the country and outside, are from India.

With about 250 major chip design companies in the country, does India qualify to be competent and self-reliant in chip design? The answer is certainly no because none of the companies part with their Intellectual Property(IPs) and design related domain knowledge. In fact most of the chip design centres owned by foreign chip manufacturers/ fabless companies have been designing chips in India and utilising Indian talent for over 20 years. The chips designed by these companies are fabricated in foreign foundries and sold world over including India.

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By encouraging these design centres to operate from Indian soil, except earning tax revenue, India has not acquired the skill set that we can design our own chips and get these manufactured in Indian or foreign foundries such as Semiconductor Laboratory(SCL), Mohali or Taiwan Semiconductor Manufacturing Company(TSMC), Taiwan.

Semiconductor laboratory, Mohali, Gallium Arsenide Enabling Technology centre(GAETEC), Hyderabad, many academic & research institutes and ISRO have their own chip design centres, each employing a couple of designers with limited experience and expertise trying to design a wide variety of chips with partial successes.

Recently, few Indian startup companies have come up in chip designing taking advantage of the production linked incentive scheme launched by the government. There is, however, a long way to go before we acquire competence in chip designing and claim to be self reliant in this high tech field.

Significance of competence

Competence is a mix of technical, managerial and commercial expertise which a company builds over time to handle business operations productively for its long term growth keeping customer’s requirements in mind. For example, the ability to innovate, cost-effective manufacturing, developing software intellectual property, building effective supply-chain mgt, excellent customer service network, rich working culture and strong brand value etc.

One or two competencies are core to the organisation which help in maintaining its leadership in a given field named as “core competence”. Other capabilities help the organisation in managing its operations successfully. These are tabulated below for illustration:

Organisation Core Competence Other Capabilities End  Products
ISRO Expertise in making  Launch vehicles and  satellites Knowledge of space sciences,

Design & integration of electronic systems, org culture, Vendor dev, Supply chain mgt.

Satellites,  launch  vehicles and launch services


Oil refining expertise,  large telecom n/w Huge refining capacity, Supply chain mgt, Huge customer base, Brand Petro  products,

Mobile services

Infosys Expertise in software application development Large technical manpower and infrastructure, worldwide presence, Brand value, Org culture Software products & services


Expertise in Engine Technology &

Low cost Mfring

Huge Prodn capacity, Components vendors n/w, Dearlers service n/w, Supply chain mgt,  Brand value Cars and SUVs


SCL Moderate expertise in chip design and process technologies Design, fabrication, test & packaging integrated prodn facility for VLSIs, MEMS and sub-systems under one roof, Excellent Org culture, Medium prodn capacity & ability to innovate Standard and Application specific VLSIs, CCDs, MEMS and systems

Imagine a company designs a XX GHz Processor in a sub micron process, having more than 50 metal layers and a three month schedule for tape out with only one chance to succeed, does it successfully and celebrates the sweet success with its design and process engineers.

Another company, in spite of a big market opportunity struggles to design devices to the customer’s specifications, goes through a few iterations, misses on delivery schedule and falls short of strategies. The companies perform differently because the former has the knowledge and expertise in chip design & fabrication and the latter falls short of the required skill set. A  competence is required to win in any space. There is hardly any field or untouched areas where there is no competition. It is therefore important to build one’s competence for survival and sustain long term growth.

Andy Grove, CEO Intel, wrote in his book, ‘Only the Paranoid Survive’ that only the entrepreneurial and the competent survive, the complacent gets killed and the management needs to focus on competence building strategies if they really want to grow. Competence is essentially an engine of growth for maintaining leadership.

Why couldn’t India build competence in chip design?

Designing a chip to specification is a herculean effort and is linked to hard work, dedication, perseverance, knowledge, expertise, talent and skill set. Chip Design involves iterative, complex and creative tasks to come up with optimal solutions. The companies put in thousands of design-engineer hours to design a microchip meeting the customers’ requirements.

Other than EDA design tools and infrastructure, design engineers are the most important resource in chip designing, the activity being very human centric and knowledge based. It takes a few years for an engineer to start contributing to the chip design, being highly technical, requiring proficiency in Electronic Design Automation(EDA) tools, electronic circuits analysis and skill to design electronic circuits that usually comes with experience. By the time a chip designer is ready to contribute, he starts looking for greener pastures elsewhere, being in high demand at attractive salary packages.

During the 1980s, the department of electronics(DoE) opened seven chip design centres at Noida, Bangalore, Bhubaneswar, Lucknow, Ahmedabad, Hyderabad and Pune with a conviction that the newly established centres would enhance the chip design capabilities of the erstwhile Semiconductor Complex Limited. However, due to lack of experienced design engineers to head these centres and high attrition rate, these centres did not contribute much to the already ongoing chip design activities at SCL Mohali, the centres could not sustain for long and closed in absence of continuous funding.

Attrition of chip design engineers was one of the major causes why India could not build competence in chip design which hindered the growth of the semiconductor industry in India during the 1980s.This aspect was highlighted as point no. 7 in an earlier article,’India’s resolve for Self Reliance in Microelectronics dated 12th April 2022.

As mentioned earlier, most of the Indian chip design houses owned by multinational semiconductor companies are designing chips, getting these fabricated outside India and selling them worldwide. However, the design intellectual property is kept a well guarded secret and not shared with others. From the viewpoint of  self-reliance, the above aspects never led to competence building in chip design in the country.

How can India now cultivate competence in chip design?

Most of the successful semiconductor companies that grew big, made fortunes, created brand value and maintained their leadership the world over are due to their competence in chip  design and ability to convert those designs into products through fabrication processes. If India wants to become self-reliant in chip manufacturing, it is imperative to be self-reliant in chip design beforehand.

Having worked for more than 31 years in the Indian chip manufacturing industry, the author is of the opinion that the weakest link in chip manufacturing in India has been chip design, though the country has a medium size 180nm chip fabrication plant with packaging & test facilities and supported with subsystems & systems assembly, all under one roof at Mohali.

It is said that the path to a sustainable chip manufacturing company goes through a successful chip design house. The government therefore must invest heavily and build competence in chip designing before funding for a mega chip manufacturing plant. India needs to devise strategies to create a chip design ecosystem in the country and think how it can train, retain and productively utilise the Indian talent and engage engineers constructively on projects of national importance rather than allowing them to seek employment elsewhere. To make a beginning, the author had suggested in an article, First National Chip Project  dated 14th June 2022, that MeitY should initiate the design of Smart Energy Metre chips immediately in a mission mode.

The Government of National Capital Territory(NCT) Delhi has set up a fully funded sports university to attract and cultivate sports talent. If a state government has planned to build competence in sports for claiming its share in the Olympics medal tally through innovative ideas, India can definitely think big and put in place a strategic plan for building competence in chip design.

Source: Part of a full page advertisement in The Tribune newspaper dated 29th June 2022
Source: Part of a full page advertisement in The Tribune newspaper dated 29th June 2022

To make chip designing a success, MeitY should consider formulating a three point action plan outlined below:

  1. Establish ‘Semiconductor Authority of India’(SAI), an entity under the Ministry of Electronics and Information Technology with the following mandate:
    • Establish a world class Integrated Chip Design Centre(ICDC) under a Public Private Partnership(PPP) model.
    • Identify national projects for chip design, look for Indian & export markets and provide funding for their implementation and delivery.
    • Motivate and encourage chip designers to develop IC-building-blocks & Intellectual Property (IPs) and undertake chip designs for targeted Indian and foreign customers.
    • Procure legacy chip designs’ IPs from potential sources rather than reinventing.
    • Set up one chip design centre in the Silicon valley headed by an experienced CTO from the valley to catch up on chip designs and for guiding design teams back in India.
    • Maintain a repository of chip designs and IPs and share the same with ICDC and SCL
    • Handover chip designs to Semiconductor Laboratory(SCL) Mohali for fabrication.
    • Coordinate with fabless and semiconductor companies for joint development of chips.
    • Advice government agencies to modulate their industrial, import and taxation policies appropriately conducive to enhance chip designing and manufacturing.
    • Formulate, steer and modulate plans to help develop an ecosystem for chip design and semiconductor manufacturing in the country.

Semiconductor Authority of India is essentially required as there should be some entity responsible to own and implement the above mandate in its entirety having authority under the legal framework of the government. Fulfilling the above mandate is a big responsibility and full time job of an organisation employing professionals to carry out the above tasks.

The author is of the opinion that without constituting such an entity, it will be difficult to build competence in chip design and create the requisite ecosystem in the country. The MeitY may not have enough time to perform the above activities due to its preoccupation with other responsibilities.

  1. Support the Integrated Chip Design Centre and develop it into the largest chip design centre of the world through the following approach:
    • Engage experienced chip designers as CTOs under a CEO at attractive salary packages and give them a free hand to manage exclusively the Integrated Chip Design Centre for designing chips in different design domain areas.
    • Induct 100 engineering students of electronics and computer science in 2022 from reputed engineering colleges based on a technical & aptitude tests and interview (to be increased to 5000 in five years 10,000 in ten years 25,000 in twenty five years) and train them for one year in chip design.
    • First semester (six months) should comprise tutorials on basic building-blocks with focus on different chip designs. The second semester shall comprise on-the-job chip designing in different domain areas appended as Note-1.
    • The entire programme shall be residential, funded by the government. The chip designers shall be trained for inculcating specific traits to ascertain their knowledge base and other qualities, appended as Note-2.
    • Upon completion of the training and selection interview, the trained engineers will be inducted in the Integrated Chip Design Centre.
    • Engineers joining Indian Chip Design Service in ICDC shall be deputed on time bound specific chip design projects. The trained designers will have to serve for minimum 25 years and shall not be allowed to seek employment elsewhere or outside the country.
    • The annual package for a designer would be highly attractive coupled with perks & facilities on par with private design houses.
    • All promotions shall be performance linked rather than length of service. Service terms shall be prepared to inculcate a competitive and team-work environment.
    • First 10 top designers shall be picked up every year for national awards. One of the designers would be considered for Bharat Ratna every five years based on the contribution made in the field of chip design.
  1. Nurture Semiconductor Laboratory with adequate funding to grow it into a large manufacturing facility, at least half the size of Taiwan Semiconductor Manufacturing Company(TSMC) Taiwan, irrespective of the private companies entering the Indian semiconductor industry. This would be necessary to fabricate & evaluate chips designed by ICDC, in-house and also develop new process technologies to keep pace and stay competitive in this high tech field through continuous research and development efforts.

There is a saying: ‘If someone wants to see a paradise, he has to die himself rather than expecting someone else to die for him’. This analogy should prompt our policy makers to take the initiative, build competence and create an ecosystem to make India self-reliant in chip design and eventually in the field of semiconductors manufacturing.

MeitY should consider implementing the above three point action plan without much delay. This drive will be a big boost for Indian engineers and the semiconductor industry. While celebrating ‘Azadi Ka Amrit Mahotsav’ in the 75th year of Independence, let us take a pledge to make India the biggest chip design house in the world and a force to reckon with in the field of Semiconductor manufacturing in the next 25 years.

Note-1: Chip design domain areas

  1. Analog
  2. Digital
  3. Mixed signal
  4. Memories
  5. CCDs Imagers and Read-out ICs
  6. Embedded processor and Systems on Chip
  7. Sensor signal conditioning & processing
  8. Micro Electro Mechanical Sensors(MEMS)
  9. Radio Frequency(RF) and communication interface blocks
  10. RadHard, Noise cancellation, electro static discharge, power mgt. and thermal design.
  11. Electro-magnetic Interference(EMI) and Compatibility(EMC) compliance 

Note-2:  Traits of a chip designer (Designers to have comprehensive knowledge in)

  1. EDA software tools, Design Rules, Target Intrinsic Parameters(TIPS)
  2. Fab processes, process variations and limitations
  3. Electronic devices, the operational characteristics, critical specs and applications.
  4. Electronics circuits configurations, circuit analysis, transfer functions, device models, operational characteristics and device behaviours
  5. Basic building blocks of analog circuits i.e. amplifiers, comparators, filters, analog switches, oscillators/ timing Circuits, Phased locked Loop ckts etc
  6. Building blocks of digital circuits, i.e. registers, counters, memories, digital filters, signal processors etc.
  7. Systems’ interfaces, communication protocols
  8. knowledge of ESD,EMI and EMC, LVDS concepts & their implications on circuits.
  9. Parasitic capacitances, noise sources, clock glitches; implications on circuit design
  10. Good in engineering mathematics, semiconductor physics, Analytical ability
  11. Ability to work in a team, focused, aptitude for design, sincerity and perseverance.

Ajay Saini is a Former Group Director of the Semiconductor laboratory. Email: [email protected]

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