Harnessing The SHAKTI For Microcontroller Chips

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“As an academic institution, we’ve done everything we can to develop the Shakti microprocessor, and now I need you to make it accessible to the world” — Prof. Kamakoti Veezhinathan

It was a momentous occasion when IIT Madras announced the release of the Shakti microprocessor in 2018. While the adoption of this chip across strategic sectors, such as defence, nuclear power installations, government agencies and departments, is yet to be seen on a massive scale, startups such as Mindgrove Technologies are working towards making it accessible to the world.

Founded and incubated under IIT Madras in 2021 by co-founders and former colleagues, Shashwath TR (CEO) and Sharan Srinivas J (CTO), fabless semiconductor startup Mindgrove Technologies harnesses the potential of open source technology and the RISC-V Instruction Set Architecture (ISA) to create a high-performance microcontroller chip operating on a 28-nanometre technology node with a SHAKTI core.

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The Shakti processor’s open source nature, released under a permissive BSD three-clause license, eliminates licensing fees and sales royalties typically associated with buying proprietary chips, reducing costs. “The RISC-V ISA combines lessons from legacy ISAs like x86, ARM, MIPS, and more, resulting in impressive performance efficiency for resources invested. The chip’s microarchitecture is designed to be simple, minimising area and power consumption, thus reducing production costs linked to chip size. We benefit from financial and infrastructure support and mentorship provided by IIT Madras, helping us identify and address potential issues early on,” says Shashwath.

The choice of a 28-nanometre technology node, however unconventional, allows the company designing chips for machine learning and characterisation-focused signal processing and vision, to deliver the required performance without resorting to excessive complexity or gate counts, resulting in power efficiency. “Our primary emphasis is on optimising performance, and then we progressively eliminate components and features until we achieve the desired power consumption. We aim to create a chip perfectly suited for its intended purpose, effectively a ‘right-sized’ chip for the task at hand,” Sharan explains.

Operating at 700MHz, the SoC has 128kB of on-chip SRAM, with two quad SPI ports that can operate at 200Mbps each. These ports can be connected to various memory types, including NOR flash, PS RAM (pseudo static RAM), and M RAM. The chip can accommodate setups like a 64MB NOR flash with one PS RAM, two NOR flashes, or one 64MB NOR flash alongside a secondary NAND flash on a quad SPI interface. Chief Technology Officer (CTO) Sharan says that a versatile memory configuration approach allows the chip to cater to various application needs, while optimising performance and memory usage.

“Our quad SPI ports provide the flexibility to connect various external modules, such as Wi-Fi, Bluetooth, etc, as peripherals to cater to specific customer needs instead of incorporating all these features within the SoC. By not embedding a fixed amount of memory directly into the package, we avoid the scenario where customers pay for more memory than their use case requires, eliminating unnecessary costs and allowing us to serve a diverse and fragmented market,” he elaborates.

The startup employs BlueSpec SystemVerilog for RTL design and uses a combination of tools for verification followed by a continuous integration approach for testing. It also develops firmware, drivers, and software parallel to hardware development to ensure smooth integration and functionality. “Ventilator is the fastest and open source simulator, making it cost-effective. We use a Python-based ‘Cocotb’ framework to control the data flow. The BlueSpec code gets compiled, the compiled code goes into Ventilator, and Cocotb controls it. We write all our test benches in Cocotb, which is in Python,” explains Sharan.

Shashwath adds that around 85% of the chip was either developed in-house or at IIT Madras, along with IP support from Synopsys. Currently, the startup expects production to start in November 2023. “We anticipate the prototype to be ready by February, after which we will soon bring the product to market. We’re already working on our second project, focusing on image processing and computer vision for integration into cameras and similar devices for on-edge applications,” Shashwath concluded.

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Yashasvini Razdan
Yashasvini Razdan
Yashasvini Razdan is a journalist at EFY. She has the rare ability to write both on tech and business aspects of electronics, thanks to an insatiable thirst to know all about technology. Driven by curiosity, she collects hard facts and wields the power of her pen to simplify and disseminate information.

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