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India Aims For $100 Billion Semiconductor Market

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India embarks on a chip manufacturing journey aiming for a $100 billion semiconductor market by 2030; the IESA advocates using 28 nm chips for domestic growth and job creation.

India’s semiconductor market is estimated to reach $100 billion by 2030. The Government of India recently greenlighted three major investment projects totalling ₹1.25 lakh crores. These projects include a fabrication facility in Gujarat and two assembly, testing, marking, and packaging (ATMP) facilities in Assam and Gujarat, which are projected to create around 80,000 job opportunities, with 20,000 direct jobs and 60,000 indirect jobs. 

Despite these initiatives to boost export-oriented production, strengthen its position in global value chains, and localise the electronics supply chain, challenges remain. The lack of infrastructure and a legacy in semiconductor manufacturing deter top investors. 

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The India Electronics and Semiconductor Association (IESA) focuses on 28nm chip technology nodes to address these issues and aims to become a global raw material supplier. Acquiring an existing foundry could jump-start manufacturing and develop the skills needed for future fabless foundries. This strategic step aims to elevate India to a tier-1 semiconductor nation and enhance its global semiconductor value chain position.

The selection of 28nm chip technology holds significant advantages on several fronts. It minimises the risk of restricted access to critical deep ultraviolet (DUV) technology, unlike more advanced processes such as extreme ultraviolet (EUV) or EUV-High NA used in sub-10nm geometries. 

In 2024, focusing on the 28nm CMOS Logic node with high-performance computing platforms is seen as a strategic entry point for India. Moreover, the 28nm node’s versatility allows it to cater to diverse applications, including IoT, automotive, connected devices, and intelligent appliances, underscoring its adaptability and potential in various sectors.

According to Satya Gupta, President of the VLSI Society, while starting with 28nm is advantageous, Faruqui emphasises that India’s semiconductor fabs should be open to more than this node. He suggests a multi-node approach from 28nm to 90nm and potentially beyond, aligning with India’s varied demand over several years. 

This strategy aims to optimise total cost of ownership (TCO) across the fab by leveraging synergies in both capital expenditure (Capex) and operational expenditure (Opex). Faruqui highlights the importance of nodes that offer manufacturing and compatibility with metrology equipment, particularly those utilising deep ultraviolet (DUV) lithography at wavelengths like 193 nm and 248nm, facilitating cost-effective transitions to 28nm processing.

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