Analogue-to-digital converters (ADC) and digital-to-analogue converters (DAC) act as bridges between the two domains. For years, these devices have remained the interface between the analogue and digital worlds. Data converters used to occupy a large chunk of your test bench or instrument rack and consumed a lot of power. The rate of data conversion offered by traditional ADCs/DACs was often a major bottleneck in any system. Today, there has been a drastic improvement in the performance of data converters. They are now incorporated into an SoC or an FPGA, leading to superior performance and power efficiency.
According to various research organisations, the global data converter market is expected to grow at a CAGR of 6.28 per cent and reach USD 6.37 billion by 2025. This growth is aided by several market factors such as the need for higher data rates in 5G infrastructures, the evolution of ultra-high speed data acquisition systems, the need for high-speed test and measurement solutions, the increasing demand for high-speed and high-resolution data for various defence, scientific and medical applications, etc. Data converters are most often used in RADAR and SIGINT (signals intelligence) applications, spectrum analysers, medical imaging, industrial, automotive safety applications, cellular base stations, and other communication infrastructure, among others.
In general, we can categorise these as general-purpose data converters and high-speed data converters, based on the sampling rate. In the higher radio frequency (RF) range (GHz), the speed offered by general purpose ADCs/DACs becomes a bottleneck. This article discusses highspeed digital-to-analogue converters and analogue-to-digital converters —their working principles and key enablers.
But first let’s look at traditional RF data conversion techniques.
The traditional approach—heterodyne conversion
Here’s a quick look at how an ADC or DAC is used in the traditional approach. An input RF signal is down-converted to an intermediate frequency, also known as IF. The carrier wave is shifted to the IF as an intermediate step by mixing the signal with a local oscillator. Once
the signal is in the IF range, simple analogue circuits are used to filter, fine tune and amplify or attenuate the signal, as required. Such processed analogue signals are then taken to the digital world through an ADC for digital signal processing.
Similarly, in digital-to-analogue conversion, the processed signal data is taken from the digital world to the analogue world through DAC, and from IF to RF through UP converters. This approach is called heterodyne conversion (IF).
A typical radio receiver design based on heterodyne conversion (IF) is shown in Figure 1.
The modulated RF carrier is passed through a low-noise amplifier (LNA) and band-pass filter (BPF) before converting to IF as shown in Figure 1. After passing through an anti-aliasing filter (AAF) the IF is digitised by the ADC. Demodulation is carried out at the baseband level.
The above approach is mostly due to the limitation of the conversion speed of ADCs. If we were to break the ADC speed barriers, would it be feasible to think of direct sampling?
Now, let’s look at the transmitter path for the heterodyne approach. Here, the baseband data is modulated in the digital domain and applied to the DAC to convert to the IF, which in turn is up-converted to RF using a mixer and LO, as shown in Figure 2.
Direct conversion or zero IF
To address the need for high-speed data conversion, a new technique called zero IF or RF sampling was implemented. This is an alternate to the heterodyne (IF) approach of handling RF signals using high-speed RF ADCs. In this case, the RF carrier is down-converted directly to the baseband instead of IF. The RF carrier is converted to the baseband (I&Q) using the IQ mixer as shown in Figure 3. Two ADCs are used to digitise I&Q data. Here, too, demodulation is carried out at the baseband level.
New high-frequency ADCs known as RF ADCs can directly sample wideband signals beyond 6GHz. In addition, these RF ADCs have built-in signal processing capabilities. An RF system designer, using the latest RF ADC, needs to design only the hardware platform and use software to configure the hardware to suit the application. An RF ADC with signal processing capabilities is shown in Figure 4.
Now, let’s look at the transmitter path for the zero IF approach. The baseband data is modulated in the I&Q modulator and applied to two DACs, which is further up-converted to RF using the IQ mixer and LO, as shown in Figure 5.
The high frequency DAC, known as RF DAC, can generate frequency up to 6GHz directly, thereby eliminating the need for IF-to-RF conversion. The RF DAC includes signal processing, as shown in Figure 6.
Zero IF systems reduce the component count and complexity of the design, hence bringing in a lot of advantages. The system noise factor is minimised, and the out-band RF blockers can be attenuated by the RF front-end filters. Overall, zero IF systems are compact and provide better performance. At the same time, since high-speed ADCs are new in the market and expensive, a cautious approach is required before finalising the design.
The trends for zero IF systems are further moving towards the System-on-Chip concept. High-speed ADCs and DACs integrated with programmable logic eliminate the need for complex digital interfaces between converters and the digital circuit. Such devices can be placed with the antennas and digitallyinterfaced to the processing world.
Rajeev Ramachandra is the chief technology officer and co-founder of Mistral Solutions Pvt Ltd. He holds a degree in computer science engineering from Bangalore University. Ramachandra has vast experience in processor based designs, ranging from embedded systems to VME, PCI, cPCI and USB bus based systems. He has also worked extensively on the Intel family and DSP based CPUs.